Physical Design Engineer
The eTopus team is comprised of industry experts in high-speed, mixed signal digital signal processing (DSP) communications systems. As a Physical Design Engineer in eTopus, you will handle all aspects of physical design implementation for multi-million gate ultra-high speed networking devices.
What can eTopus do for you?
- Potential for upward mobility in a fast-moving Silicon Valley startup
- Opportunity to work with the like-minded talent to solve challenging problems
- Becoming part of the creator of ultra-high speed interconnect technology to enable the next generation of Cloud Data Centers
What can you do for eTopus?
- Floorplanning, including ESD/pad ring development
- Place and route, clock tree synthesis, extraction, timing closure in leading edge technology
- Low power design methodology with power domains/UPF/CPF
- Static Timing Analysis, including signoff definition
- Physical Verification
- IR drop and EM analysis
Required skills and experience
- Hands-on experience in full-chip/block level place and route, floorplanning, power planning, chip integration, ECO flows, timing closure, power and clock optimization and physical verification
- Knowledge of RTL-to-GDS flow, synthesis, static-timing-analysis, lower power design, DFT
- Scripting skills using TCL, Perl, or shell
- The ability to work independently and on a team while interfacing with team members located all over the world
- Tape-out experience in 40nm / 28nm process nodes or below
Qualifications
- BS/MS/PhD in Electrical Engineering and Computer Engineering
Working Location
- Hong Kong office / Headquarters & Innovation Center