eTopus attended the 2025 TSMC Taiwan Symposium
May 21, 2025
On May 15th,eTopus attended the 2025 TSMC Taiwan Symposium. The symposium attracted over 900 experts from the semiconductor industries worldwide. They gathered to discuss the application value and technological development trends of advanced semiconductor processes, chip packaging, industrial ecology and cooperation, etc.
eTopus showcased outstanding high-speed interface IP technologies, including the high-speed 224G/112G SerDes,32G/16G UCIe and PCIe 7.0/6.0. These IP are designed for high-speed interconnection scenarios in AI data centers and communication devices, delivering an unprecedented performance experience.
eTopus’s 112G SerDes IP solution, based on ADC/DSP receiver architecture, supports PAM4 and NRZ transmission. It enables long reach transmission with 42dB@112G PAM4, featuring low power consumption, low latency, and high efficiency and stability. The solution supports IEEE802.3bj/cd/ck, InfiniBand EDR, OIF CEI-112G-LR/MR/XSR Electrical Interfaces, SFF-TA-1028, and INF-8628. It supports both line and system loopback modes, delivering superior BER (Bit Error Rate) performance.
With the continuous upgrading of applications, the trend toward higher-speed Ethernet connections is inevitable. This not only saves power and space but also increases interconnection density. Below are the details of eTopus’s 224G SerDes solution.
eTopus 224G SerDes solution
- Extra Long Reach Superior BER performance in high insertion loss channels
- Scalable Enables optimal power & latency tradeoffs at different data rates
- 可靠性 Achieves superior pre- and post-FEC Bit Error
- 从铜缆到光缆 Supports IEEE802.3, InfiniBand EDR/HDR, OIF CEI-224G Electrical Interfaces etc.
eTopus also provides standardized, high-bandwidth, low-latency UCIe IP solutions, integrated with NoC (Network-on-Chip), enabling seamless collaboration between dies within a chip and significantly improving data processing efficiency.
eTopus UCIe Solution
- Supports Standardized UCIe V1.1/2.0
Starting from the IP architecture design, strict compliance with the UCIe standard is ensured. UCIe Verification IP is run during the design process to guarantee adherence to specifications. - High Bandwidth
32GT/s, reaching 36GT/s in private mode. - 低延迟
As fast as 2.x ns, leading among domestic solutions. - Silicon-Proven
Already validated through silicon testing, ensuring customer confidence in usage. - Integrated Optimization Packages with Partners
Provides packaged solutions integrating UCIe + NoC optimization.
• UCIe Die-to-Die Bandwidth: 128 GB/s per Module
- NoC Bandwidth: 1000GB/s
- UCIe Latency: 2.x ns
- NoC Latency: 15~20ns
In addition, eTopus showcased PCIe 7.0/6.0. The solution integrated controller testchip and power optimized PCIe6 N6 v1.1
eTopus PCIe 7.0 solution
- Long Reach Super transmit capability in high insertion loss channels
- PIPE v7.0 Support PIPE v7.0 to be compatible with PCIe, CXL controller
- 可靠性 Superior BER performance in high insertion loss channels
- Low power Low power consumption with optimized low latency and area
eTopus will focus on creating greater value to high-speed data interconnection, making data transmission more stable and secure.
If you want to learn more about eTopus’ latest technologies, please contact sales@etopus.com for inquiries.
