SerDes clocking catered to robust noise handling in advanced process technologies for HPC, Datacenter, 5G and AI applications Find out how eTopus aids high-speed data center links needed to support a wide span of data rates and protocols, employing complex modulation schemes and varying insertion loss requirements from VSR at few dBs to LR at …
Avery Design Systems PCI Express VIP Enables eTopus SerDes IP and Next-Generation ASIC and Chiplet Applications to Achieve Compliance and High-Speed Connectivity Tewksbury, MA., June 21, 2022 Avery Design Systems, a leader in functional verification solutions, today announced it has been chosen by eTopus as its verification IP solution partner for eTopus PCIe Gen 1-6 …
QuickLogic and eTopus Announce Disaggregated, Flexible eFPGA Chiplet Template Targeting advanced, high-performance applications | Available initially as configurable IP and later as Known Good Die chiplets SAN JOSE, Calif., June 16, 2022 QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power multi-core voice-enabled SoCs, embedded FPGA IP, and Endpoint AI solutions, and eTopus, a leader …
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Hirose and eTopus Technology Develop Combined PCIe Gen6 64Gbps PAM4 Interconnect Solution for AI Training Applications Complete bench setup using Hirose mezzanine/card edge connectors and eTopus SerDes IP will be demonstrated at DesignCon in San Jose San Jose, Calif. – April 6, 2022 Hirose Electric Co., Ltd., a global leader in connector technology, its design, …
eTopus Announces PCIe IP Gen 1-6 and 800G Support for 7/6nm with Support for SoC & Chiplet Clients San Jose, CA – Mar 29, 2022 eTopus Technology today announces the design-in availability of its 7/6nm multi-protocol SerDes IP optimized for PCIe Gen 1 to 6 SoC & Chiplet clients. This new IP also supports Ethernet …
eTopus Announces Collaborative IP Platform for Rapid and Economical Deployment of Chiplets Includes IPs such as SerDes, eFPGA, Ethernet MAC/PCS, Die2Die and RISC-V San Jose, CA – Feb 2, 2022 eTopus Technology today announced in partnership with QuickLogic and OpenFive, a platform of base IP that can be easily integrated by chiplet developers with minimal …
eTopus introduces 400G(4x100G) LR IP solution incorporating new FEC & ePHY with combined latency of sub 10ns San Jose, CA – October 19, 2021 eTopus Technology, a pioneer of ultra-high-speed ADC/DSP-based SerDes for wireline applications is proud to introduce its new 400G Long Range (LR) IP solution incorporating Forward Error Correction (FEC) IP and the eTopus DSP-based …
Amphenol ICC Develops 112Gb/s Interconnect Technology with eTopus Products for High Speed IP Solutions Sept 14, 2021 San Jose, CA, USA – Amphenol ICC, the global leader in connector technology, design and manufacturing, and eTopus Technology, a pioneer of ultra-high-speed ADC/DSP-based SerDes for wireline applications including data center, cloud, edge, and 5G base stations, today …
eTopus Selects Diakopto’s ParagonX™ Platform for Ultra-High Speed SerDes IP Breakthrough Software and Methodology Enables Fast and Insightful IC Design Debugging and Optimization San Jose, CA – August 24, 2021 Diakopto announced today that eTopus, a pioneer of ultra-high speed ADC/DSP-based SerDes for wireline applications, has chosen the ParagonX platform and methodology for integrated circuits …
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Hirose and eTopus Technology Develop Combined 112Gbps Interconnect Solution for AI Training Applications Complete bench setup using Hirose mezzanine connectors and eTopus SerDes IP will be demonstrated at DesignCon in San Jose San Jose, CA – August 17, 2021 Hirose Electric Co., Ltd., a global leader in connector technology, its design, and manufacturing, …